Mixed-Signal Design Verification Engineer (m/f) at Ferroelectric Memory GmbH

FMC is an innovative and ambitious start-up company in the field of embedded non-volatile (eNVM) memory solutions. With its novel and ground-breaking memory technology, based on ferroelectrics, FMC serves the needs of the rapidly growing IoT market for current and future technology nodes. FMC is looking for a Mixed-Signal Design Verification Engineer (m/f) to complement our team with focus on development of embedded non-volatile memory IP cores.


You will be responsible for the verification of FeFET memory IC designs and building blocks. You will work in close collaboration with our design and characterization teams and your tasks will include:

  • Development of verification plans
  • Development of an efficient and reusable verification environment
  • Development and integration of top-level and module-level test benches
  • Definition and implementation of test cases
  • Development and integration of verification IPs
  • Active participation in SOC test development and debug

Your profile: 

  • Sc. / M.Eng. or higher in electrical engineering
  • Experience in analog/mixed-signal verification
  • Knowledge of different verification methodologies
  • Familiarity with industry-standard design and simulation tools (e.g. Cadence® DFII)
  • Good technical comprehension
  • Strong problem solving ability
  • Ability to work in a team environment
  • Interest in working in a start-up environment

The following skills are a plus: 

  • Experience in non-volatile memory design, concepts and operation
  • Programming/scripting skills in SKILL, Python, Verilog, Verilog-AMS, SystemVerilog, SystemC, TCL, C


  • Planned starting date: ASAP

We offer:

Competitive salary will be based on a combination of fixed salary and yearly bonus payments.

For further information please contact:

Ferroelectric Memory GmbH
Attn.: Marko Noack
Noethnitzer Str. 64
Dresden, Germany

T +49 178 1666185