Design Verification Engineer

FMC develops ferroelectric emerging Non-Volatile Memory solutions for stand-alone and embedded applications. Having emerged as a dynamic spin-off from TU Dresden/NaMLab in 2016, we have progressed beyond the startup phase to solidify our position as a significant player in the Memory industry. We are pursuing the once-in-a-lifetime opportunity to establish a brand-new memory product in a market that is craving this innovation.

If you’re ready to contribute your expertise to our dynamic team and play a pivotal role in driving our success, we invite you to apply for the position of Design Verification Engineer (m/f/d) at FMC.

Your future job:

  • Set up and maintain the verification environment for NVM products
  • Develop and maintain behavioral model
  • Develop test benches and run regressions for coverage analysis
  • Run formal verification to ensure functional correctness

Your profile:

  • Sc. / B.Eng. in electrical engineering, informatics or similar field of study
  • 5 years of experience in Design Verification
  • Knowledge of UVM and System Verilog
  • Strong problem-solving ability
  • Interest in working in a start-up environment

Period: Planned starting date ASAP

We offer:

Benefits includes inspiring work environment, flat hierarchies, opportunity for personal and professional growth (including complimentary training opportunities), multi-cultural team, regular team events, Urban Sports Club membership, free public transportation ticket or fuel voucher, lunch allowance and a competitive salary in a semiconductor environment.

For further questions or to apply please contact:

Lisa Leinemann
Senior HR Manager

Tel.: +49 351 271 88347

career@ferroelectric-memory.com