Working Student – Electrical Test of Memory Materials and Integrated Chips

FMC is a memory company developing emerging Non-volatile Memory solutions for stand-alone and embedded applications using hafnium oxide based ferroelectric films. We are an innovative startup founded in 2016 as spin-off from TU Dresden/NaMLab that has grown to >40 people.

Fabless companies as well as semiconductor manufacturers are nowadays looking for disruptive Non-volatile Memory (NVM) solutions like ours. With our novel and ground-breaking memory technology, based on ferroelectrics, we serve the needs of the rapidly growing IoT market for current and future technology nodes.

Sounds interesting? We want you as Working Student (m/f/d) in our headquarter in Dresden!

Your objectives as Working Student:

To pursue our technology development, FMC develop ferroelectric capacitor stacks in collaboration with academia, tool vendors and fabs. Devices range from simple capacitor structures via shortloop vehicles to integrated arrays on 300 mm wafers. The electrical tests are performed on state-of-the-art test equipment and analyzed using Python-based scripts. As a working student at FMC, your tasks will be:

  • Plan and schedule measurement tasks assigned to you
  • Prepare Python scripts and samples for tests on probe stations
  • Analyze the results and discuss next steps with your supervisor
  • Familiarize step by step with further test equipment and routines

We are looking for a student who wants to stay for 12 months or longer. As your experience level and skill set progresses, the topics can be expanded according to FMC’s focus and your interests, e.g. towards reliability or failure mode analysis. Moreover, we will be happy to offer opportunities for future project work or thesis topics.

Your profile:

  • Enrolled as a student: Electrical Engineering, Physics, Nanoelectronics or similar
  • First experience with electronic lab instruments (oscilloscopes, semiconductor tester, I-V/C-V meters probe stations…); Programming skill & will to use Python measurement scripts to operate the testers
  • Good technical comprehension, reliable and thorough worker with the motivation to grow with us
  • Team player fluent in English (B2) to efficiently communicate with our international team of engineers

What to expect:

As a working student you can benefit from the opportunity of personal and professional growth in an inspiring work environment with flat hierarchies in a multi-cultural team. Other benefits are regular team events, healthy office refreshments and a competitive salary in a semiconductor environment.

For further questions or to apply please contact:

Lisa Leinemann
HR & Office Manager

Tel.: +49 351 271 88347

career@ferroelectric-memory.com

Senior Analog IC Design Engineer

FMC is a Ferroelectric Hafnium Oxide memory company developing emerging Non-Volatile Memory solutions for stand-alone and embedded applications. We are an innovative startup founded in 2016 as spin-off from TU Dresden/NaMLab. With our novel and ground-breaking memory technology, based on ferroelectrics, we serve the needs of the rapidly growing IoT market for current and future technology nodes.

To strengthen our ambitious and international team, we are hiring asap a Senior Analog IC Design Engineer (m/f/d) for our headquarter in Dresden or our Office in Milan.

Your future job:

  • Design and develop emerging NVM memory devices based on Hafnium Oxide technology
  • Support the design team in defining specifications and integrating the designed blocks into the memory
  • Responsible for the design of analog circuits for NVM memories: sense amps, decoders, bandgap, HV regulators, ADC, LDO, Charge Pumps, etc.
  • Run PVT circuit verification including parasitic extraction
  • Work closely with layout engineers to ensure block robustness and area optimization
  • Perform post silicon verification

Your profile:

  • Master Degree or PhD in Electrical Engineering or a similar study course
  • Minimum 6 years of professional experience in analog/mixed-signal CMOS IC design
  • NVM design experience would be a plus
  • Familiarity with industry-standard design and simulation tools (e.g., Cadence® DFII, Virtuoso, Spice simulator, Verilog-A)
  • Good knowledge of CMOS technology
  • Strong problem-solving skills
  • Ability to work in team

Period: Planned starting date ASAP

Location: Dresden (Germany) or Milan (Italy)

We offer:

Perks include inspiring work environment, flat hierarchies, opportunity for personal and professional growth (including complimentary training opportunities), multi-cultural team, regular team events, Urban Sports Club membership, free public transportation ticket or fuel voucher, lunch allowance, healthy office refreshments, and a competitive salary in a semiconductor environment.

For further questions or to apply please contact:

Lisa Leinemann
HR & Office Manager

Tel.: +49 351 271 88347

career@ferroelectric-memory.com

DDR RTL Sr. Design Engineer

FMC develops ferroelectric emerging Non-Volatile Memory solutions for stand-alone and embedded applications.

Having emerged as a dynamic spin-off from TU Dresden/NaMLab in 2016, we have progressed beyond the startup phase to solidify our position as a significant player in the Memory industry. We are pursuing the once-in-a-lifetime opportunity to establish a brand-new memory product in a market that is craving this innovation.

We are inviting you to be part of this exhilarating journey. As our DDR RTL engineer (m/f/d), you will be at our headquarter in Dresden or Milan office.

Your future job:

  • Responsible for the design and verification of high-speed DDR control logic interface including command decode, address registers, mode registers, data path and clock tree
  • Perform synthesis, timing and power analysis
  • Optimize performance, power and area parameters
  • Support silicon bring-up
  • Work closely with AMS, verification and layout teams
  • Verify compliance with JEDEC specifications

Your profile:

  • M.Sc. / Ph.D. in electrical engineering
  • 8+ years of experience in high speed interface design
  • DDR4 RTL design experience for memory or controller devices
  • Familiarity with industry-standard design and simulation tools (e.g., VDI, Xcelium, Genus, Conformal)
  • Verilog, synthesis, STA, formal verification, DFT
  • Lab experience

Period: Planned starting date ASAP

Location: Milan (Italy) or Dresden (Germany)

We offer:

Benefits includes inspiring work environment, flat hierarchies, opportunity for personal and professional growth (including complimentary training opportunities), multi-cultural team, regular team events, Urban Sports Club membership, free public transportation ticket or fuel voucher, lunch allowance and a competitive salary in a semiconductor environment.

For further questions or to apply please contact:

Lisa Leinemann
HR & Office Manager

Tel.: +49 351 271 88347

career@ferroelectric-memory.com

FMC @ International Symposium on Applications of Ferroelectrics (ISAF) in Tours, France

Our Lead of Stack Development, Dr. Tony Schenk, was offered to give an invited talk at the Joint ISAF-PFM-ECAPD 2022 taking place end of June in Tours, France. The International Symposium on Applications of Ferroelectrics (ISAF) is the most renowned international conference on ferroelectrics. It is an honor for FMC to get invited to present there. We are looking forward to welcoming you to the talk and to discussions evolving from it.